
//[2009.06.25.목]{------------------------------------------------------------
//정확한 STM32F 계열은 <*.h> 가 없으므로 아예 꼭 필요한 것만 추출하여 만든다.
//필요에 따라 더 많은 내용이 추가될수 있다.
//
//[2009.11.21.토][수정!!!]----------------------------------------------------
//더 추가된 것으로 수정한다.
//}---------------------------------------------------------------------------


#ifndef STM32F103C8T6_H
#define STM32F103C8T6_H


//[FLASH]
//{
    #define  FLASH            0x40022000
    #define  FLASH_ACR        (FLASH + 0x000)
    #define  FLASH_KEYR       (FLASH + 0x004)
    #define  FLASH_OPTKEYR    (FLASH + 0x008)
    #define  FLASH_SR         (FLASH + 0x00c)
    #define  FLASH_CR         (FLASH + 0x010)
    #define  FLASH_AR         (FLASH + 0x014)
    #define  FLASH_OBR        (FLASH + 0x01c)
    #define  FLASH_WRPR       (FLASH + 0x020)

//}

//[RCC]
//{
    #define  RCC             0x40021000
    #define  RCC_CR          (RCC + 0x000)
    #define  RCC_CFGR        (RCC + 0x004)
    #define  RCC_CIR         (RCC + 0x008)
    #define  RCC_APB2RSTR    (RCC + 0x00c)
    #define  RCC_APB1RSTR    (RCC + 0x010)
    #define  RCC_AHBENR      (RCC + 0x014)
    #define  RCC_APB2ENR     (RCC + 0x018)
    #define  RCC_APB1ENR     (RCC + 0x01c)
    #define  RCC_BDCR        (RCC + 0x020)
    #define  RCC_CSR         (RCC + 0x024)

//}

//[USART]
//{
    #define  USART1         0x40013800
    #define  USART1_SR      (USART1 + 0x000)
    #define  USART1_DR      (USART1 + 0x004)
    #define  USART1_BRR     (USART1 + 0x008)
    #define  USART1_CR1     (USART1 + 0x00c)
    #define  USART1_CR2     (USART1 + 0x010)
    #define  USART1_CR3     (USART1 + 0x014)
    #define  USART1_GTPR    (USART1 + 0x018)

    #define  USART2         0x40004400
    #define  USART2_SR      (USART2 + 0x000)
    #define  USART2_DR      (USART2 + 0x004)
    #define  USART2_BRR     (USART2 + 0x008)
    #define  USART2_CR1     (USART2 + 0x00c)
    #define  USART2_CR2     (USART2 + 0x010)
    #define  USART2_CR3     (USART2 + 0x014)
    #define  USART2_GTPR    (USART2 + 0x018)

    #define  USART3         0x40004800
    #define  USART3_SR      (USART3 + 0x000)
    #define  USART3_DR      (USART3 + 0x004)
    #define  USART3_BRR     (USART3 + 0x008)
    #define  USART3_CR1     (USART3 + 0x00c)
    #define  USART3_CR2     (USART3 + 0x010)
    #define  USART3_CR3     (USART3 + 0x014)
    #define  USART3_GTPR    (USART3 + 0x018)

//}

//[SPI]
//{
    #define  SPI1            0x40013000
    #define  SPI1_CR1        (SPI1 + 0x000)
    #define  SPI1_CR2        (SPI1 + 0x004)
    #define  SPI1_SR         (SPI1 + 0x008)
    #define  SPI1_DR         (SPI1 + 0x00c)
    #define  SPI1_CRCPR      (SPI1 + 0x010)
    #define  SPI1_RXCRCR     (SPI1 + 0x014)
    #define  SPI1_TXCRCR     (SPI1 + 0x018)
    #define  SPI1_I2SCFGR    (SPI1 + 0x01c)
    #define  SPI1_I2SPR      (SPI1 + 0x020)

    #define  SPI2            0x40003800
    #define  SPI2_CR1        (SPI2 + 0x000)
    #define  SPI2_CR2        (SPI2 + 0x004)
    #define  SPI2_SR         (SPI2 + 0x008)
    #define  SPI2_DR         (SPI2 + 0x00c)
    #define  SPI2_CRCPR      (SPI2 + 0x010)
    #define  SPI2_RXCRCR     (SPI2 + 0x014)
    #define  SPI2_TXCRCR     (SPI2 + 0x018)
    #define  SPI2_I2SCFGR    (SPI2 + 0x01c)
    #define  SPI2_I2SPR      (SPI2 + 0x020)

//}

//[GPIO]
//{
    #define  GPIOA         0x40010800
    #define  GPIOA_CRL     (GPIOA + 0x000)
    #define  GPIOA_CRH     (GPIOA + 0x004)
    #define  GPIOA_IDR     (GPIOA + 0x008)
    #define  GPIOA_ODR     (GPIOA + 0x00c)
    #define  GPIOA_BSRR    (GPIOA + 0x010)
    #define  GPIOA_BRR     (GPIOA + 0x014)
    #define  GPIOA_LCKR    (GPIOA + 0x018)    

    #define  GPIOB         0x40010c00
    #define  GPIOB_CRL     (GPIOB + 0x000)
    #define  GPIOB_CRH     (GPIOB + 0x004)
    #define  GPIOB_IDR     (GPIOB + 0x008)
    #define  GPIOB_ODR     (GPIOB + 0x00c)
    #define  GPIOB_BSRR    (GPIOB + 0x010)
    #define  GPIOB_BRR     (GPIOB + 0x014)
    #define  GPIOB_LCKR    (GPIOB + 0x018)

    #define  GPIOC         0x40011000
    #define  GPIOC_CRL     (GPIOC + 0x000)
    #define  GPIOC_CRH     (GPIOC + 0x004)
    #define  GPIOC_IDR     (GPIOC + 0x008)
    #define  GPIOC_ODR     (GPIOC + 0x00c)
    #define  GPIOC_BSRR    (GPIOC + 0x010)
    #define  GPIOC_BRR     (GPIOC + 0x014)
    #define  GPIOC_LCKR    (GPIOC + 0x018)

    #define  GPIOD         0x40011400
    #define  GPIOD_CRL     (GPIOD + 0x000)
    #define  GPIOD_CRH     (GPIOD + 0x004)
    #define  GPIOD_IDR     (GPIOD + 0x008)
    #define  GPIOD_ODR     (GPIOD + 0x00c)
    #define  GPIOD_BSRR    (GPIOD + 0x010)
    #define  GPIOD_BRR     (GPIOD + 0x014)
    #define  GPIOD_LCKR    (GPIOD + 0x018)

//}

//[AFIO]
//{
    #define  AFIO            0x40010000
    #define  AFIO_EVCR       (AFIO + 0x000)
    #define  AFIO_MAPR       (AFIO + 0x004)
    #define  AFIO_EXTICR1    (AFIO + 0x008)
    #define  AFIO_EXTICR2    (AFIO + 0x00c)
    #define  AFIO_EXTICR3    (AFIO + 0x010)
    #define  AFIO_EXTICR4    (AFIO + 0x014)

//}

//[EXTI]
//{
    #define  EXTI          0x40010400
    #define  EXTI_IMR      (EXTI + 0x000)
    #define  EXTI_EMR      (EXTI + 0x004)
    #define  EXTI_RTSR     (EXTI + 0x008)
    #define  EXTI_FTSR     (EXTI + 0x00c)
    #define  EXTI_SWIER    (EXTI + 0x010)
    #define  EXTI_PR       (EXTI + 0x014)

//}

//[I2C]
//{
    #define  I2C1          0x40005400
    #define  I2C1_CR1      (I2C1 + 0x000)
    #define  I2C1_CR2      (I2C1 + 0x004)
    #define  I2C1_OAR1     (I2C1 + 0x008)
    #define  I2C1_OAR2     (I2C1 + 0x00c)
    #define  I2C1_DR       (I2C1 + 0x010)
    #define  I2C1_SR1      (I2C1 + 0x014)
    #define  I2C1_SR2      (I2C1 + 0x018)
    #define  I2C1_CCR      (I2C1 + 0x01c)
    #define  I2C1_TRISE    (I2C1 + 0x020)

    #define  I2C2          0x40005800
    #define  I2C2_CR1      (I2C2 + 0x000)
    #define  I2C2_CR2      (I2C2 + 0x004)
    #define  I2C2_OAR1     (I2C2 + 0x008)
    #define  I2C2_OAR2     (I2C2 + 0x00c)
    #define  I2C2_DR       (I2C2 + 0x010)
    #define  I2C2_SR1      (I2C2 + 0x014)
    #define  I2C2_SR2      (I2C2 + 0x018)
    #define  I2C2_CCR      (I2C2 + 0x01c)
    #define  I2C2_TRISE    (I2C2 + 0x020)

//}

//[RTC]
//{
    //[2009.10.18.일][수정!!!]{-------------------------
    //RTC 의 모든 레지스터는 16BIT단위로 접근해야 한다.
    //}-------------------------------------------------

    #define  RTC         0x40002800
    #define  RTC_CRH     (RTC + 0x000)
    #define  RTC_CRL     (RTC + 0x004)
    #define  RTC_PRLH    (RTC + 0x008)
    #define  RTC_PRLL    (RTC + 0x00c)
    #define  RTC_DIVH    (RTC + 0x010)
    #define  RTC_DIVL    (RTC + 0x014)
    #define  RTC_CNTH    (RTC + 0x018)
    #define  RTC_CNTL    (RTC + 0x01c)
    #define  RTC_ALRH    (RTC + 0x020)
    #define  RTC_ALRL    (RTC + 0x024) 

//}

//[TIM1]
//{
    //[2009.10.18.일][추가!!!]
    
    #define  TIM1         0x40012c00
    #define  TIM1_CR1     (TIM1 + 0x000)
    #define  TIM1_CR2     (TIM1 + 0x004)
    #define  TIM1_SMCR    (TIM1 + 0x008) 
    #define  TIM1_DIER    (TIM1 + 0x00c) 
    #define  TIM1_SR      (TIM1 + 0x010) 
    #define  TIM1_EGR     (TIM1 + 0x014) 
    #define  TIM1_CCMR1   (TIM1 + 0x018) 
    #define  TIM1_CCMR2   (TIM1 + 0x01c) 
    #define  TIM1_CCER    (TIM1 + 0x020) 
    #define  TIM1_CNT     (TIM1 + 0x024) 
    #define  TIM1_PSC     (TIM1 + 0x028) 
    #define  TIM1_ARR     (TIM1 + 0x02c) 
    #define  TIM1_RCR     (TIM1 + 0x030) 
    #define  TIM1_CCR1    (TIM1 + 0x034) 
    #define  TIM1_CCR2    (TIM1 + 0x038) 
    #define  TIM1_CCR3    (TIM1 + 0x03c) 
    #define  TIM1_CCR4    (TIM1 + 0x040) 
    #define  TIM1_BDTR    (TIM1 + 0x044) 
    #define  TIM1_DCR     (TIM1 + 0x048) 
    #define  TIM1_DMAR    (TIM1 + 0x04c) 
    
//}

//[TIM2]
//{
    //[2009.10.18.일][추가!!!]
    
    #define  TIM2         0x40000000
    #define  TIM2_CR1     (TIM2 + 0x000) 
    #define  TIM2_CR2     (TIM2 + 0x004) 
    #define  TIM2_SMCR    (TIM2 + 0x008) 
    #define  TIM2_DIER    (TIM2 + 0x00c) 
    #define  TIM2_SR      (TIM2 + 0x010) 
    #define  TIM2_EGR     (TIM2 + 0x014) 
    #define  TIM2_CCMR1   (TIM2 + 0x018) 
    #define  TIM2_CCMR2   (TIM2 + 0x01c) 
    #define  TIM2_CCER    (TIM2 + 0x020) 
    #define  TIM2_CNT     (TIM2 + 0x024) 
    #define  TIM2_PSC     (TIM2 + 0x028) 
    #define  TIM2_ARR     (TIM2 + 0x02c) 
    //#define  TIM2_RCR     (TIM2 + 0x030) 
    #define  TIM2_CCR1    (TIM2 + 0x034) 
    #define  TIM2_CCR2    (TIM2 + 0x038) 
    #define  TIM2_CCR3    (TIM2 + 0x03c) 
    #define  TIM2_CCR4    (TIM2 + 0x040) 
    //#define  TIM2_BDTR    (TIM2 + 0x044) 
    #define  TIM2_DCR     (TIM2 + 0x048) 
    #define  TIM2_DMAR    (TIM2 + 0x04c) 
    
//}

//[TIM3]
//{
    //[2009.10.18.일][추가!!!]
    
    #define  TIM3         0x40000400
    #define  TIM3_CR1     (TIM3 + 0x000) 
    #define  TIM3_CR2     (TIM3 + 0x004) 
    #define  TIM3_SMCR    (TIM3 + 0x008) 
    #define  TIM3_DIER    (TIM3 + 0x00c) 
    #define  TIM3_SR      (TIM3 + 0x010) 
    #define  TIM3_EGR     (TIM3 + 0x014) 
    #define  TIM3_CCMR1   (TIM3 + 0x018) 
    #define  TIM3_CCMR2   (TIM3 + 0x01c) 
    #define  TIM3_CCER    (TIM3 + 0x020) 
    #define  TIM3_CNT     (TIM3 + 0x024) 
    #define  TIM3_PSC     (TIM3 + 0x028) 
    #define  TIM3_ARR     (TIM3 + 0x02c) 
    //#define  TIM3_RCR     (TIM3 + 0x030) 
    #define  TIM3_CCR1    (TIM3 + 0x034) 
    #define  TIM3_CCR2    (TIM3 + 0x038) 
    #define  TIM3_CCR3    (TIM3 + 0x03c) 
    #define  TIM3_CCR4    (TIM3 + 0x040) 
    //#define  TIM3_BDTR    (TIM3 + 0x044) 
    #define  TIM3_DCR     (TIM3 + 0x048) 
    #define  TIM3_DMAR    (TIM3 + 0x04c) 
    
//}

//[TIM4]
//{
    //[2009.10.18.일][추가!!!]
    
    #define  TIM4         0x40000800
    #define  TIM4_CR1     (TIM4 + 0x000) 
    #define  TIM4_CR2     (TIM4 + 0x004) 
    #define  TIM4_SMCR    (TIM4 + 0x008) 
    #define  TIM4_DIER    (TIM4 + 0x00c) 
    #define  TIM4_SR      (TIM4 + 0x010) 
    #define  TIM4_EGR     (TIM4 + 0x014) 
    #define  TIM4_CCMR1   (TIM4 + 0x018) 
    #define  TIM4_CCMR2   (TIM4 + 0x01c) 
    #define  TIM4_CCER    (TIM4 + 0x020) 
    #define  TIM4_CNT     (TIM4 + 0x024) 
    #define  TIM4_PSC     (TIM4 + 0x028) 
    #define  TIM4_ARR     (TIM4 + 0x02c) 
    //#define  TIM4_RCR     (TIM4 + 0x030) 
    #define  TIM4_CCR1    (TIM4 + 0x034) 
    #define  TIM4_CCR2    (TIM4 + 0x038) 
    #define  TIM4_CCR3    (TIM4 + 0x03c) 
    #define  TIM4_CCR4    (TIM4 + 0x040) 
    //#define  TIM4_BDTR    (TIM4 + 0x044) 
    #define  TIM4_DCR     (TIM4 + 0x048) 
    #define  TIM4_DMAR    (TIM4 + 0x04c) 
    
//}

//[TIMx]
//{
    //[2009.11.04.수][추가!!!]{----------------------------------------------
    //타이머 T2 - T4 까지 쉽게 접근하고 구분으로 인한 기술양을 줄이기 위하여 
    //이 규칙성을 확용한 별도의 레지스터를 준비한다.
    //
    //unsigned int  txbase;
    //
    //로 선언하여 사용하면 된다.
    //}----------------------------------------------------------------------
    
    #define  TIMx         txbase
    #define  TIMx_CR1     (TIMx + 0x000)
    #define  TIMx_CR2     (TIMx + 0x004) 
    #define  TIMx_SMCR    (TIMx + 0x008) 
    #define  TIMx_DIER    (TIMx + 0x00c) 
    #define  TIMx_SR      (TIMx + 0x010) 
    #define  TIMx_EGR     (TIMx + 0x014) 
    #define  TIMx_CCMR1   (TIMx + 0x018) 
    #define  TIMx_CCMR2   (TIMx + 0x01c) 
    #define  TIMx_CCER    (TIMx + 0x020) 
    #define  TIMx_CNT     (TIMx + 0x024) 
    #define  TIMx_PSC     (TIMx + 0x028) 
    #define  TIMx_ARR     (TIMx + 0x02c) 
    //#define  TIMx_RCR     (TIMx + 0x030) 
    #define  TIMx_CCR1    (TIMx + 0x034) 
    #define  TIMx_CCR2    (TIMx + 0x038) 
    #define  TIMx_CCR3    (TIMx + 0x03c) 
    #define  TIMx_CCR4    (TIMx + 0x040) 
    //#define  TIMx_BDTR    (TIMx + 0x044) 
    #define  TIMx_DCR     (TIMx + 0x048) 
    #define  TIMx_DMAR    (TIMx + 0x04c)
    
//}

//[PWR]
//{
    #define  PWR         0x40007000
    #define  PWR_CR      (PWR + 0x000)
    #define  PWR_CSR     (PWR + 0x004) 

//}

//[BKP]
//{
    #define  BKP         0x40006c00
    #define  BKP_CR      (BKP + 0x030)
    #define  BKP_RTCCR   (BKP + 0x02c)

//}

//[Cortex-M3:SCB]
//{
    #define  SCB          0xe000ed00
    #define  SCB_CPUID    (SCB + 0x000)
    #define  SCB_ICSR     (SCB + 0x004)
    #define  SCB_VTOR     (SCB + 0x008)
    #define  SCB_AIRCR    (SCB + 0x00c)
    #define  SCB_SCR      (SCB + 0x010)
    #define  SCB_CCR      (SCB + 0x014)
    #define  SCB_SHPR1    (SCB + 0x018)
    #define  SCB_SHPR2    (SCB + 0x01c)
    #define  SCB_SHPR3    (SCB + 0x020)
    #define  SCB_SHCRS    (SCB + 0x024)
    #define  SCB_CFSR     (SCB + 0x028)
    #define  SCB_HFSR     (SCB + 0x02c)
    #define  SCB_MMAR     (SCB + 0x034)
    #define  SCB_BFAR     (SCB + 0x038)

//}

//[Cortex-M3:STK]
//{
    //SysTick 관련.

    #define  STK          0xe000e010
    #define  STK_CTRL     (STK + 0x000)
    #define  STK_LOAD     (STK + 0x004)
    #define  STK_VAL      (STK + 0x008)
    #define  STK_CALIB    (STK + 0x00c)

//}

//[Cortex-M3:NVIC]
//{
    #define  NVIC          0xe000e100
    #define  NVIC_ISER0    (NVIC + 0x000)
    #define  NVIC_ISER1    (NVIC + 0x004)
    #define  NVIC_ISER2    (NVIC + 0x008)
    #define  NVIC_ICER0    (NVIC + 0x080)
    #define  NVIC_ICER1    (NVIC + 0x084)
    #define  NVIC_ICER2    (NVIC + 0x088)
    #define  NVIC_ISPR0    (NVIC + 0x200)
    #define  NVIC_ISPR1    (NVIC + 0x204)
    #define  NVIC_ISPR2    (NVIC + 0x208)
    #define  NVIC_ICPR0    (NVIC + 0x280)
    #define  NVIC_ICPR1    (NVIC + 0x284)
    #define  NVIC_ICPR2    (NVIC + 0x288)
    #define  NVIC_IABR0    (NVIC + 0x300)
    #define  NVIC_IABR1    (NVIC + 0x304)
    #define  NVIC_IABR2    (NVIC + 0x308)
    #define  NVIC_IPR0     (NVIC + 0x400)
    #define  NVIC_IPR1     (NVIC + 0x404)
    #define  NVIC_IPR2     (NVIC + 0x408)
    #define  NVIC_IPR3     (NVIC + 0x40c)
    #define  NVIC_IPR4     (NVIC + 0x410)
    #define  NVIC_IPR5     (NVIC + 0x414)
    #define  NVIC_IPR6     (NVIC + 0x418)
    #define  NVIC_IPR7     (NVIC + 0x41c)
    #define  NVIC_IPR8     (NVIC + 0x420)
    #define  NVIC_IPR9     (NVIC + 0x424)
    #define  NVIC_IPR10    (NVIC + 0x428)
    #define  NVIC_IPR11    (NVIC + 0x42c)
    #define  NVIC_IPR12    (NVIC + 0x430)
    #define  NVIC_IPR13    (NVIC + 0x434)
    #define  NVIC_IPR14    (NVIC + 0x438)
    #define  NVIC_IPR15    (NVIC + 0x43c)
    #define  NVIC_IPR16    (NVIC + 0x440)
    #define  NVIC_STIR     (NVIC + 0xe00)

//}

//[PWM 채널과 핀 정의]
//{
    //[2009.11.05.목][추가!!!]{----------------------------------------
    //채널에 따른 GPIO 정보를 정의한다.
    //채널과 GPIO 가 규칙성이 없으므로 직접 1:1 로 기술해 주어야 한다.
    //}----------------------------------------------------------------

    //타이머 번호를 정의한다.
    #define  T2    0
    #define  T3    1
    #define  T4    2

    //[2009.11.05.목][추가!!!]
    //채널번호를 정의한다.
    #define  CH0   0
    #define  CH1   1
    #define  CH2   2
    #define  CH3   3

    //                  [GPIO 번호]  [비트번호]
    #define  T2CH0    ((d_Gpio_A << 4) | 15)
    #define  T2CH1    ((d_Gpio_B << 4) | 3 )
    #define  T2CH2    ((d_Gpio_B << 4) | 10)
    #define  T2CH3    ((d_Gpio_B << 4) | 11)

    #define  T3CH0    ((d_Gpio_B << 4) | 4 )
    #define  T3CH1    ((d_Gpio_B << 4) | 5 )
    #define  T3CH2    ((d_Gpio_B << 4) | 0 )
    #define  T3CH3    ((d_Gpio_B << 4) | 1 )

    #define  T4CH0    ((d_Gpio_B << 4) | 6 )
    #define  T4CH1    ((d_Gpio_B << 4) | 7 )
    #define  T4CH2    ((d_Gpio_B << 4) | 8 )
    #define  T4CH3    ((d_Gpio_B << 4) | 9 )

//}

//[정의]
//{
    //직접 주소계산에 사용하기 위하여 <index> 로 정의한다.
    #define  d_Gpio_A    0
    #define  d_Gpio_B    1
    #define  d_Gpio_C    2
    #define  d_Gpio_D    3

    //[출력설정]
    //{
        //각 4비트 값을 갖는다(CNF:MODE 에 대응한다).
        //출력의 경우는 MODE 가 속도가 되나, 입력과 확실한 구분을 위하여 
        //일단 무조건 11b 로 설정한다.
        #define  d_Gpio_PushPullOut        0x03
        //일단은 Open-Drain 도 일반 출력으로 설정해 놓는다.
        #define  d_Gpio_OpenDrainOut       0x07 

        //[일반핀출력][2009.09.07.월][추가!!!]{----------------------------------------------------------
        //실제 맷돌모듈의 모든 핀은 출력시 <Open-Drain> 이 되므로 일반 적으로
        //사용하기 쉬운 이름을 하나 정의한다.
        #define  d_Gpio_MdlOut             d_Gpio_OpenDrainOut
        //}----------------------------------------------------------------------------------------------

        #define  d_Gpio_AltPushPullOut     0x0b
        #define  d_Gpio_AltOpenDrainOut    0x0f

        //[기능핀출력][2009.09.07.월][추가!!!]{---------------------------------------------------------------- 
        //실제 맷돌모듈의 모든 핀은 출력시 <Open-Drain> 이 되므로 일반 적으로
        //사용하기 쉬운 이름을 하나 정의한다.
        #define  d_Gpio_MdlAltOut          d_Gpio_AltOpenDrainOut
        //}----------------------------------------------------------------------------------------------------

        //[속도]
        //{
            //[속도] 는 출력핀으로 설정한 경우만적용된다.
            #define  d_Gpio_Spd_H    0x03 
            #define  d_Gpio_Spd_M    0x02
            #define  d_Gpio_Spd_L    0x01

        //}

    //}

    //[입력설정]
    //{
        #define  d_Gpio_AltIn              0x00
        #define  d_Gpio_ZIn                0x04
        #define  d_Gpio_PullDownIn         0x08
        //원래 STM32 자체는 설정값이 풀다운과 같지만, 정의값을 구분하기 위하여 
        //CNF:10b => CNF:11b 로 정의하였다.
        //실제 이 상수정의를 사용하는 부분에서 이를 구분하여 다시 제값을 할당하게된다.
        #define  d_Gpio_PullUpIn           0x0c

    //}

//}


#endif

